Thin film resistors are desirable components for high precision analog and mixed signal applications, such as medical device applications. In addition to a low thermal coefficient of resistance, low voltage coefficient of resistance, and good resistor matching, they typically provide good stability under stress. Chromium-silicon (CrSi) resistors are particularly well suited for use in medical devices because the resistivity of CrSi resistors can be controlled within about 1 to 2% and resistor matching is easier than with other thin film resistors, such as nickel-chromium (NiCr) resistors. In addition, CrSi is a cleaner working material than other thin film resistor materials such as NiCr.
The manufacture of semiconductor devices with thin film resistors presents a number of challenges. One challenge related directly to the thin film resistors is location. Thin film resistors often are sandwiched between layers of metal or below and offset from one or more metal layers of the interconnect stack. At these locations, the thin film resistors are exposed to a number of thermal cycles during formation of the interconnect stacks and overlying devices. Each thermal cycle degrades the resistor values of the thin film resistors. Accordingly, the thin film resistors may have resistor values that are substantially different from the original, desired resistor values.
Other challenges are related to formation of the interconnect stacks themselves. For example, certain applications, such as medical equipment applications, are requiring semiconductor devices with smaller geometries. However, such small geometries are difficult to achieve by present-day fabrication techniques. Interconnect stacks typically utilize copper layers and copper interconnect lines that are formed using damascene or inlaid processes. During a damascene process, a dielectric layer is deposited overlying a previously fabricated metal layer or plug. A photoresist mask is deposited on the dielectric layer and a via contact is etched within the dielectric to the previously fabricated metal layer or plug. Copper then is deposited within the via contact. However, the etching of the via contacts to the various interconnect layers during such damascene processes is often imprecise because the photoresist masks used to form the vias often are deposited on uneven dielectric layer surfaces. Thus, space between the interconnect layers or other devices has to be maintained to compensate for any photolithography misalignment.
Another challenge encountered by typical copper interconnect technology involves the often inadequate step coverage achieved with a copper deposit within the vias. In a typical metal deposition process, voids within the via contacts may form. The voids tend to aggregate and create reliability issues for the interconnection.
Accordingly, it is desirable to provide a semiconductor structure that is formed with a thin film resistor that is not substantially degraded by thermal cycles. In addition, it is desirable to provide a semiconductor structure that is formed with a thin film resistor and that is suitable for reduction to small geometries. Moreover, it is desirable to provide a semiconductor structure with a thin film resistor with enhanced reliability. It also is desirable to provide methods for fabricating such semiconductor structures. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description of the invention and the appended claims, taken in conjunction with the accompanying drawings and this background of the invention.